Neural networks and chip design

DOI zum Zitieren dieses Dokuments:: 10.5283/epub.16267

Morgenstern, Ingo

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Veröffentlichungsdatum dieses Volltextes: 23 Aug 2010 11:59

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Zusammenfassung

I present an abstraction of the Hopfield-model for neural networks which is suitable for physical chip design using commerically available two-dimensional gate arrays. It can be shown that ±1-bonds combined with a dilution of about 80–90% of the original Hopfield-connections still lead to a comparable performance of the network. Furthermore the learning capability of the chips is discussed. ...