Neural networks and chip design

DOI to cite this document:: 10.5283/epub.16267

Morgenstern, Ingo

PDF
(554kB) - Repository staff only

Date of publication of this fulltext: 23 Aug 2010 11:59

Alternative links to fulltext:DOI

Details

Export bibliographical data

Abstract

I present an abstraction of the Hopfield-model for neural networks which is suitable for physical chip design using commerically available two-dimensional gate arrays. It can be shown that ±1-bonds combined with a dilution of about 80–90% of the original Hopfield-connections still lead to a comparable performance of the network. Furthermore the learning capability of the chips is discussed. ...